This dataset contains detailed wafer-level manufacturing, metrology, defect inspection, and electrical test data collected from a semiconductor fabrication environment. It is designed to support yield analysis, process optimization, fault detection, and predictive modeling across multiple technology nodes and product types.

Each record represents an individual wafer processed through a standard semiconductor manufacturing flow including etch, lithography, deposition, and ion implantation steps. The dataset captures tool identifiers, process parameters, maintenance effects, inline metrology measurements, defect density, electrical test results, and final yield outcomes.

The data spans multiple production lots, technology nodes, and product categories, enabling analysis of:

Yield variability across technology nodes

Impact of process tool performance and drift

Correlation between metrology measurements, defect density, and electrical parameters

Root cause analysis and yield prediction using machine learning

This dataset is suitable for:

Semiconductor yield forecasting

Process control and monitoring (SPC)

Predictive maintenance modeling

Data science and machine learning applications in manufacturing

The Semi-AD (Semiconductor Anomaly Detection) dataset is a specialized benchmark for unsupervised comparison-based anomaly detection (AD) in the semiconductor manufacturing. This dataset addresses the critical challenge of identifying rare defects in intricate circuit patterns by leveraging the inherent repetitive structures of semiconductor devices. It provides precisely aligned image pairs consisting of a reference device and a test device and ground truth annotations of defective regions are derived from pixel-wise differences between the aligned pairs.

Dataset Card for Semiconductor-Dataset

This dataset has been created with distilabel.

  Dataset Summary

This dataset contains a pipeline.yaml which can be used to reproduce the pipeline that generated it in distilabel using the distilabel CLI: distilabel pipeline run --config "https://huggingface.co/datasets/johnsonafooll/Semiconductor-Dataset/raw/main/pipeline.yaml"

or explore the configuration: distilabel pipeline info --config… See the full description on the dataset page: https://huggingface.co/datasets/johnsonafooll/Semiconductor-Dataset.

Context

Manufacturing process feature selection and categorization

Content

Abstract: Data from a semi-conductor manufacturing process

• Data Set Characteristics: Multivariate
• Number of Instances: 1567
• Area: Computer
• Attribute Characteristics: Real
• Number of Attributes: 591
• Date Donated: 2008-11-19
• Associated Tasks: Classification, Causal-Discovery
• Missing Values? Yes

A complex modern semi-conductor manufacturing process is normally under consistent surveillance via the monitoring of signals/variables collected from sensors and or process measurement points. However, not all of these signals are equally valuable in a specific monitoring system. The measured signals contain a combination of useful information, irrelevant information as well as noise. It is often the case that useful information is buried in the latter two. Engineers typically have a much larger number of signals than are actually required. If we consider each type of signal as a feature, then feature selection may be applied to identify the most relevant signals. The Process Engineers may then use these signals to determine key factors contributing to yield excursions downstream in the process. This will enable an increase in process throughput, decreased time to learning and reduce the per unit production costs.

To enhance current business improvement techniques the application of feature selection as an intelligent systems technique is being investigated.

The dataset presented in this case represents a selection of such features where each example represents a single production entity with associated measured features and the labels represent a simple pass/fail yield for in house line testing, figure 2, and associated date time stamp. Where .1 corresponds to a pass and 1 corresponds to a fail and the data time stamp is for that specific test point.

Using feature selection techniques it is desired to rank features according to their impact on the overall yield for the product, causal relationships may also be considered with a view to identifying the key features.

Results may be submitted in terms of feature relevance for predictability using error rates as our evaluation metrics. It is suggested that cross validation be applied to generate these results. Some baseline results are shown below for basic feature selection techniques using a simple kernel ridge classifier and 10 fold cross validation.

Baseline Results: Pre-processing objects were applied to the dataset simply to standardize the data and remove the constant features and then a number of different feature selection objects selecting 40 highest ranked features were applied with a simple classifier to achieve some initial results. 10 fold cross validation was used and the balanced error rate (*BER) generated as our initial performance metric to help investigate this dataset.

SECOM Dataset: 1567 examples 591 features, 104 fails

FSmethod (40 features) BER % True + % True - % S2N (signal to noise) 34.5 +-2.6 57.8 +-5.3 73.1 +2.1 Ttest 33.7 +-2.1 59.6 +-4.7 73.0 +-1.8 Relief 40.1 +-2.8 48.3 +-5.9 71.6 +-3.2 Pearson 34.1 +-2.0 57.4 +-4.3 74.4 +-4.9 Ftest 33.5 +-2.2 59.1 +-4.8 73.8 +-1.8 Gram Schmidt 35.6 +-2.4 51.2 +-11.8 77.5 +-2.3

Attribute Information:

Key facts: Data Structure: The data consists of 2 files the dataset file SECOM consisting of 1567 examples each with 591 features a 1567 x 591 matrix and a labels file containing the classifications and date time stamp for each example.

As with any real life data situations this data contains null values varying in intensity depending on the individuals features. This needs to be taken into consideration when investigating the data either through pre-processing or within the technique applied.

The data is represented in a raw text file each line representing an individual example and the features seperated by spaces. The null values are represented by the 'NaN' value as per MatLab.

Acknowledgements

Authors: Michael McCann, Adrian Johnston

Inspiration

• Semiconductor manufacturing has multi dimensional description of each process. Can we find key performance index by using big data techniques?

Complete dataset included in the full report. Detailed tables, regional splits, forecasts, and methodologies are available with purchase.

Complete dataset included in the full report. Detailed tables, regional splits, forecasts, and methodologies are available with purchase.

In 2025, semiconductor industry revenue from discrete semiconductor components reached 30.7 billion U.S. dollars. Forecasts predict that in 2026, revenues from discrete semiconductors will rise to 33.19 billion U.S. dollars, a eight percent increase from 2025. Further forecasts suggest that the revenue will increase to 35.71 billion U.S. dollars by 2027.

The dataset used for multi-class semiconductor wafer defect detection and classification consists of wafer map images generated from real manufacturing processes. Each wafer map represents the spatial distribution of defective and non-defective dies, enabling the identification of distinct defect patterns such as center, edge-loc, edge-ring, scratch, random, and near-full, alongside normal wafers. The dataset is inherently imbalanced, with certain defect classes having significantly fewer samples compared to others, reflecting the actual rarity of some defect types in semiconductor fabrication. This imbalance poses challenges for model training and necessitates the use of advanced augmentation and balancing strategies. The high dimensionality and variability of defect patterns make the dataset suitable for evaluating the robustness and generalization ability of deep learning models. Overall, the dataset provides a realistic and challenging benchmark for developing automated wafer defect classification frameworks to improve semiconductor manufacturing yield and quality control.

In 2025, optoelectronic semiconductor sales worldwide reached 43 billion US dollars. In 2026, sales are expected to amount to 44.2 billion US dollars, a marginal increase of 2.7 percent as compared to the previous year.

By 2035, the Semiconductor Market is projected to reach USD 1593.9 Bn, up from USD 662.6 Bn in 2025, at a CAGR of 9.1%

Imports of Semiconductors in the United States decreased to 5994.28 USD Million in February from 6525.82 USD Million in January of 2024. This dataset includes a chart with historical data for the United States Imports of Semiconductors.

Semiconductor market size was valued at USD 739.0 Billion in 2025, expected to reach USD 1265.2 Billion at a CAGR of 5.97% during 2026-2034.

In 2025, revenue from semiconductor analog component sales reached 86.52 billion U.S. dollars, and is expected to rise to 95.4 billion U.S. dollars by 2026. This represents a predicted increase of approximately 10.2 percent for 2025 as compared to the previous year.

Complete dataset included in the full report. Detailed tables, regional splits, forecasts, and methodologies are available with purchase.

Semiconductor market size is forecasted to reach USD 2.56 trillion by 2040, growing at a 9.17% CAGR from USD 750 billion in 2026.

Complete dataset included in the full report. Detailed tables, regional splits, forecasts, and methodologies are available with purchase.

Semiconductor Dataset

This dataset is a collection of Scientific Report / Paper related to Semiconductor.

  Dataset Details

This dataset was curated from the SciRepEval dataset and only using any information that related to Semiconductor fields.

Military & Defense Semiconductor Market is estimated to hit USD 13.3 Bn By 2034, Riding on a Strong 7% CAGR throughout the forecast period.

Semiconductor Manufacturing Equipment Market is estimated to reach USD 208.9 billion By 2033, Riding on a Strong 8.2% CAGR.

In the first quarter of 2026, Taiwan Semiconductor Manufacturing Company (TSMC) recorded a market share of **** percent in the global semiconductor foundry market, while Samsung occupied *** percent of the market. In terms of revenue, the top ten semiconductor foundries worldwide generated ***** billion U.S. dollars in the fourth quarter of 2025. The semiconductor manufacturing process is complex The semiconductor supply chain can be categorized into roughly three distinct stages: design, fabrication, and assembly. Companies that perform all three of these steps are referred to as integrated device manufacturers, with examples including Intel and Samsung. Firms that only design chips, known as fabless companies, rely on chip manufacturers, or foundries, for fabrication. A reliance on semiconductor foundries Fabless companies work closely with the foundries, companies that manufacture chips in fabrication plants, with the market leader TSMC contracted by various companies. Founded in 1987, TSMC decided not to manufacture any products under its name so that the company never engages in direct competition with its customers. Under this strategy, TSMC became the world 9s largest semiconductor foundry and a key supplier for large tech companies.